In semiconductor and photovoltaic manufacturing, the flatness of wafers or substrates directly determines device performance. This is akin to crafting a flawless Olympic ice rink—any microscopic undulation can compromise the precision of subsequent processes. The single-side polisher serves as the “ice rink maker,” providing an ideal starting platform for chip fabrication.

Core Metrics of Surface Figure Quality

To evaluate the quality of this “ice rink,” we focus on three key dimensions:

• Global Flatness (GBIR): The difference between the highest and lowest points across the entire wafer surface .

• Site Flatness (SFQR): The flatness within critical microscopic regions—often the bottleneck in advanced process nodes .

• Common Figure Errors: “Center-dishing” (excessive material removal at the center) and “edge-dishing” (excessive removal at the edge).

These directly impact “competition quality”—i.e., device yield and performance.

Key Variables in Figure Control

Single-side polishers achieve ultra-precision material removal through a sophisticated mechanical system and control architecture:

• The wafer/substrate is held onto a ceramic carrier plate via vacuum or other adsorption methods.

• The surface to be polished remains in contact with a rotating polishing pad.

• Material removal occurs through the synergistic action of applied pressure, relative motion, and slurry chemistry.

To create a perfect “ice surface,” multiple factors must be precisely coordinated:

1. Reference Plane: Ceramic carrier flatness—serves as the baseline for all adjustments and requires periodic conditioning.

2. Primary Lever: Pressure distribution—the most direct and critical control variable.

3. Transmission Interface: Polishing pad and platen profile—their condition and shape directly affect how pressure is transmitted.

4. Process Environment: Downforce, rotational speeds, and slurry properties.

5. Bonding Layer: Wafer adsorption method—must ensure stress-free, uniform contact between wafer and carrier.

   
   

Logic and Workflow of Figure Correction

The essence of figure tuning lies in using a zoned pressure system to induce controlled micro-deformations in the ceramic carrier, thereby compensating for non-uniform material removal.

Core Principle (Inverse Compensation Logic):
To reduce removal in a specific zone, decrease the backside pressure on that zone; to increase removal, raise the pressure.

Systematic Adjustment Workflow:

1. Measurement & Diagnosis

• Polish a test wafer under stable process conditions.

• Use a surface metrology tool to obtain a “material removal map.”

• Interpret the map: “center-dishing” shows deeper color at the center; “edge-dishing” shows deeper color at the periphery.

2. Adjustment & Iterative Validation

• For center-dishing: Reduce center pressure or slightly increase edge pressure to induce a micro-convex carrier shape, shifting pressure outward.

• For edge-dishing: Reduce edge pressure or slightly increase center pressure to create a micro-concave carrier, concentrating pressure toward the center.

• Critical Step: After adjustment, always re-polish a new test wafer, measure again, and compare data for the next fine-tuning iteration. This is a process of iterative convergence.

  
  

Complementary Tuning Strategies

When pressure adjustments reach their limits or yield diminishing returns, consider:

1. Polishing Pad Replacement: Hard pads improve global flatness; soft pads enhance local flatness.

2. Speed Ratio Optimization: Adjusting the relative rotation speeds alters the polishing trajectory and improves uniformity.

3. Ceramic Carrier Reconditioning: If pressure tuning fails, suspect carrier deformation—re-flat the carrier.

4. Platen Profile Correction: If pressure settings consistently operate at extremes, revise the baseline platen figure.

Core Principles for Crafting the Perfect “Nanometer-Scale Ice Rink”

• Focus on Details: Adjust only one variable at a time to ensure traceable outcomes.

• Stability First: Process stability outweighs the pursuit of extreme parameters.

• Data-Driven Decisions: Log every adjustment to build a robust process knowledge base.

• Safety Above All: Strictly adhere to operational safety protocols.

In the pursuit of the “nanometer-scale Olympic ice rink,” Siplus Semiconductor’s single-side polishers equip the “hardcore arena” of third-generation semiconductors with professional-grade tools:

• Ultra-large-diameter, water-cooled, high-rigidity platen ensures stable operation under demanding conditions;

• Multi-zone, high-precision polishing head enables exact pressure distribution control;

• Center-wheel-free, clean platen design significantly reduces scratch risk.

With high throughput, superior yield, and rapid response capability, Siplus has become a key enabler in advancing polishing—from merely “able to polish” to truly “polishing well.”