As AI computing power demand grows exponentially, the physical characteristics of traditional silicon-based semiconductor materials are approaching their limits. Energy consumption bottlenecks in data centers have become a critical challenge that the entire industry must confront.
Meanwhile, technological breakthroughs in third-generation semiconductor materials are providing the most fundamental support for this computing power revolution. From silicon carbide to gallium nitride, wide bandgap semiconductor materials, with their superior performance, are reshaping the future landscape of AI data centers.
AI Computing Power Explosion: Data Centers Face Severe Energy Consumption Bottlenecks
The booming AI industry is driving explosive growth in computing power demand, with intelligent computing centers experiencing leapfrog development as critical infrastructure.
As the core infrastructure for AI computing power, data centers are seeing continuous increases in power consumption. Accelerating the coordinated optimization of computing power and power systems has become an urgent priority for the sustainable development of the data center industry. The International Energy Agency (IEA) estimates that by 2030, global data center electricity consumption will reach approximately 945 terawatt-hours (TWh), slightly exceeding Japan's current annual total electricity consumption.
As AI chip power consumption breaks through the kilowatt level, single-rack power is advancing from the traditional 20-30kW to 600kW and even megawatt levels. This poses enormous challenges to data center power supply architectures and cooling systems.
Power Supply Innovation: Third-Generation Semiconductors Drive Efficiency Improvements
As AI data center power demands continue to increase, power supply system architectures are undergoing profound transformations.
Traditional 54V DC power supply systems can no longer meet the needs of future gigawatt-level data centers. To reduce transmission losses, the industry is rapidly evolving along the path from 48V → 400V → 800V.
Against this backdrop, the 800V HVDC architecture has emerged. Third-generation semiconductors are an indispensable foundation for implementing 800V architecture. In the 800V HVDC architecture, power devices based on silicon carbide and gallium nitride, with their high-voltage tolerance and low-loss characteristics, can effectively improve system frequency, reduce passive component volume, and achieve energy conversion efficiency of over 96%.
Cooling Breakthrough: The Core Value of Silicon Carbide Heat Dissipation Layers
The sharp increase in AI chip power consumption presents unprecedented cooling challenges to chip packaging technology, creating new application scenarios for third-generation semiconductor materials.
The cooling bottlenecks of traditional silicon/glass interposers are becoming increasingly prominent. As systems like NVIDIA GB300 exceed kilowatt-level power consumption, the heat flux density inside chips has reached the limits of traditional materials. The industry is actively exploring new cooling solutions: silicon carbide, with thermal conductivity three times that of silicon, is increasingly being seen as an ideal material to replace traditional silicon interposers.
Technical advantages of silicon carbide heat dissipation layers:
• Excellent thermal conductivity: Thermal conductivity reaches 350-490 W/mK, more than three times that of silicon, enabling rapid heat conduction and dissipation from chips
• Good thermal matching: Thermal expansion coefficient is closer to chip materials, reducing reliability issues caused by thermal stress
• High-temperature resistance: Can operate stably in high-temperature environments above 600°C, adapting to high power density cooling requirements
Specific application scenarios:In 2.5D/3D advanced packaging, silicon carbide can serve as a heat dissipation interposer, directly contacting the chip's backside to more efficiently conduct heat away from the chip. Simultaneously, it can function as a thermal diffusion plate to evenly distribute temperatures in hotspot areas, preventing localized overheating.
12-inch wafer dicing and TSV etching technologies have become key to unlocking the potential of advanced packaging. With global CoWoS production capacity expected to surge to 885,000 wafers in 2025 (a 108% annual increase), silicon carbide applications in interposers will experience explosive growth.
Technical Barriers: 12-inch Substrate Preparation Determines Future Success
The performance of wide bandgap semiconductor devices largely depends on substrate material quality. Mastering 12-inch substrate precision processing technology has become crucial for establishing competitive industry barriers.
Facing the high hardness and brittleness characteristics of silicon carbide, traditional cutting, grinding, and polishing processes urgently need upgrading. These materials are prone to cracking, surface damage, and subsurface damage during processing, placing extremely high demands on process precision.
Siplus Semiconductor has established technological and cost barriers for 12-inch substrate processing for industry-leading enterprises. By precisely controlling cutting depth, grinding pressure, and polishing accuracy, our equipment can ensure substrate surface quality while minimizing subsurface damage layers, achieving stable mass production and providing strong support for customers to gain a competitive edge in the next-generation semiconductor race.
Future Prospects: Materials and Computing Power Dance Together
Looking from the 2025 perspective, the symbiotic relationship between semiconductor materials and computing centers will become increasingly close.
Further development of AI computing power depends on breakthroughs in semiconductor materials, while material advancements require computing power support. In 2025, the global silicon carbide market continues to grow, with AI data centers and new energy vehicles becoming important driving forces.
Simultaneously, 6-inch SiC substrates will achieve large-scale supply, 8-inch substrates will gradually reach mass production, 12-inch substrates will be successfully developed, and trench-type SiC MOSFET chip process flows will be fully established. These technological advances will provide stronger foundational material support for AI data centers.
As AI computing power demand doubles annually, data center server power density has approached physical limits. Innovations in third-generation semiconductor materials have already shown the industry a glimmer of hope for breaking through these constraints.